One or more embodiments relate to a method of programming a nonvolatile memory device and, more particularly, to a method of programming a nonvolatile memory device, which is capable of storing 3-bit information.
A nonvolatile memory device has the advantages of random access memory (RAM), which enables the writing and erasure of data, and read only memory (ROM), which retains data even without the supply of power, and so has recently been widely used for the storage media of portable electronic devices, such as digital cameras, personal digital assistants (PDAs), and MP3 players.
The nonvolatile memory device includes a memory cell array, a row decoder, a page buffer unit, etc. The memory cell array includes a plurality of word lines elongated in rows, a plurality of bit lines elongated in columns, and a plurality of cell strings corresponding to the respective bit lines.
Memory cells have varying threshold voltages according to their program states. It is ideal that the memory cells have the same threshold voltage according to the state of data to be stored. However, in the case in which a program operation is actually performed on the memory cells, the threshold voltages of the memory cells have a different probability distribution in each region because of various external environments, such as the device characteristics and the coupling effect.
To increase the amount of data to be stored, a multi-level cell (MLC) capable of storing data of 2 bits or more in one memory cell was developed.
To store data of 2 bits or more in a memory cell, the number of threshold voltage distributions of the MLC is many and the time that it takes to perform a program operation in the MLC is long, as compared with a single level cell (SLC) capable of storing only one bit information.
Unlike in the SLC in which a program operation is performed using one word line as one page, in the MLC, a program operation is performed using many logical pages on the assumption that the MLC has the number of logical pages equal to the number of bits that can be stored in relation to one word line.
For example, an MLC capable of storing 2-bit information logically includes a least significant bit (SLC) page and a most significant bit (MSB) page in relation to one word line (i.e., a physical page). An MLC capable of storing 3-bit information logically includes an LSB page, a center significant bit (CSB) page, and an MSB page in relation to one word line.
Accordingly, while the logical pages are programmed, neighboring memory cells are continuously subject to interference, which leads to a failure in an ideal threshold voltage distribution.